Jitter Calculator

Convert phase noise to RMS jitter, estimate peak‑to‑peak jitter, and relate jitter to SNR for clocks, PLLs, ADCs, and SERDES.

Phase Noise to RMS Jitter

Enter carrier frequency and a phase‑noise table. The tool integrates phase noise over the selected offset band to compute RMS jitter.

Integration limits are applied to the phase‑noise table; points outside are ignored.

Paste offset frequency and phase noise (dBc/Hz) as two columns, separated by space, comma, or tab. One point per line.

RMS Jitter

σt (seconds)
σt (ps)
σt (fs)

Integrated Phase Noise

σφ (radians RMS)
σφ (degrees RMS)
Integrated noise power

How this jitter calculator works

1. From phase noise to RMS jitter

Single‑sideband (SSB) phase noise L(f) is usually specified in dBc/Hz versus offset frequency f from the carrier. To obtain RMS timing jitter:

1. Convert L(f) from dBc/Hz to linear:

\( L_\text{lin}(f) = 10^{L(f)/10} \)

2. Approximate the integrated phase noise power:

\( \sigma_\phi^2 \approx 2 \int_{f_1}^{f_2} L_\text{lin}(f)\, df \)

3. RMS phase noise:

\( \sigma_\phi = \sqrt{\sigma_\phi^2} \;\;[\text{radians}] \)

4. Convert to RMS jitter:

\( \sigma_t = \dfrac{\sigma_\phi}{2\pi f_0} \)

This tool performs the integration numerically using your phase‑noise table and the chosen offset‑frequency band.

2. RMS vs peak‑to‑peak jitter

For purely random Gaussian jitter, peak‑to‑peak jitter grows with observation time. A common engineering approximation is:

\( J_\text{pp} \approx N_\sigma \cdot J_\text{rms} \)

where Nσ is typically between 6 and 14 depending on the required bit‑error rate (BER). The RMS ↔ peak‑to‑peak tab lets you choose Nσ explicitly.

3. Jitter‑limited SNR for ADCs

Sampling clock jitter limits the achievable SNR of an ADC for a sinusoidal input of frequency fIN:

\( \text{SNR}_\text{jitter} \approx -20 \log_{10}\big(2\pi f_\text{IN}\sigma_t\big) \)

Rearranged:

\( \sigma_t = \dfrac{1}{2\pi f_\text{IN} 10^{\text{SNR}/20}} \)

Use this to determine the maximum allowable jitter for a target SNR, or to estimate SNR from a known jitter value.

4. Unit‑interval (UI) jitter

In serial links, jitter is often expressed in unit intervals:

UI period: \( T_\text{UI} = \dfrac{1}{R_b} \)

Jitter in UI: \( J_\text{UI} = \dfrac{J_t}{T_\text{UI}} \)

where Rb is the bit rate and Jt is the timing jitter in seconds.

Practical tips

  • Always specify the integration band when quoting jitter from phase noise.
  • Exclude regions where the phase‑noise data is unreliable or dominated by spurs.
  • For high‑speed links, compare total jitter (random + deterministic) against the eye‑diagram mask in UI.

Jitter Calculator FAQ

What is jitter in clocks and data converters?

Jitter is the short‑term variation of a signal’s timing from its ideal position. For clocks and data converters it is usually specified as RMS jitter in seconds (or ps/fs), or as peak‑to‑peak jitter over a defined observation time. Excessive jitter degrades SNR, increases BER, and closes the eye diagram in high‑speed links.

Which phase‑noise points should I include in the integration?

Include the offset‑frequency range that is relevant to your application. For example, for a clock driving an ADC, integrate from a few kHz (above the loop bandwidth of the PLL) up to a fraction of the Nyquist frequency. Exclude regions dominated by spurs or measurement noise, or treat spurs separately as deterministic jitter.

Why do different tools give slightly different jitter values from the same phase‑noise data?

Differences usually come from integration limits, interpolation method (linear vs log‑frequency), how close‑in noise is treated, and whether spurs are included. This calculator lets you control the integration band and scale so you can match the assumptions of your datasheet or measurement setup.